Myri-10G PCI Express NIC with an SFP+ transceiver port
for 10GBase-SR and 10GBase-LR applications

Product photoProduct Codes:
• 10G-PCIE-8A-S: NIC with a standard PCI faceplate
• 10G-PCIE-8AL-S: NIC with a low-profile PCI faceplate

Key Features:
• Low-profile PCI Express x8 add-in card
• Dual protocol, 10-Gigabit Ethernet or 10-Gigabit Myrinet
• Wire-speed performance
• Firmware-controlled offloads
Preferred Myri-10G NIC for 10GBase-SR and -LR

Specifications:

Myri-10G network port: SFP+ (Small Form factor Pluggable) socket for an SFP+ transceiver, either 10GBase-SR or 10GBase-LR, 10+10 Gbit/s data rate, full-duplex. The SFP+ socket provides SFI 10.3125 GBaud 64b/66b-encoded signaling, electrical power, and the standard SFP+ management interface. The socket does not require the use of SFP+ transceivers purchased from Myricom. The socket may also be used with SFP+-terminated twinax cables up to 5m (24AWG), or with SFP+-terminated EOE cables. The port can operate with either Ethernet or Myrinet protocols at the Data Link layer. When operating in Ethernet mode, the port supports Ethernet flow control as defined by IEEE 802.3x. (See this Guide to Myri-10G PHYs (pdf).)

PCI Express host port: This NIC is a x8 (8 lane) PCI Express Add-in Card. It is capable of exchanging data with a host computer at up to 2 GBytes/s (250 MBytes/s per lane) data rate in each direction, full-duplex. The port is fully compliant with the PCI Express Card Electromechanical Specification Rev. 1.1, and with the PCI Express Base Specification Rev. 1.1. The circuit-board edge connector of the NIC will fit mechanically in x8 or x16 physical slots in host computers. The NIC auto-negotiates operation in the widest available mode (x8, x4, x2, or x1) supported by the slot it is plugged into.

Optional PCI Express capabilities supported: Advanced Error Reporting, Device Serial Number. Firmware with Completion Timeout Control capability is available upon request.

These NICs have been tested and qualified in many commercially available motherboards and with all of the common PCI Express chip sets. See this tabulation for the test results with different motherboards and chip sets.

NIC processor: The NIC is based on a Myricom custom-VLSI chip called the Lanai Z8E. The RISC and other processors inside the Lanai-Z8E chip operate at 300MHz minimum.

Local memory: 2MB (256Kx8B). The local memory operates from the same 300MHz clock as the processors in the Lanai Z8E, and provides 2,400 MB/s of local-memory bandwidth. Byte parity is generated and checked on all on-chip and off-chip memories. The local memory is used principally for firmware execution and for buffering packet headers. Packet data is buffered inside the Lanai Z8E.

EEPROM: 512KB, which includes the firmware required for PCI device initialization and an Etherboot (PXE-compatible) driver. The driver loads the matching firmware as required by the mode in which the NIC is operating. The EEPROM can be re-programmed in-place by the Lanai Z8E.

LEDs (4): The yellow LED labeled S on the PCI faceplate is controlled by the Lanai firmware; its interpretation is different for different firmware. The 3 green LEDs on the PCI faceplate indicate Link connectivity, RX traffic, and TX traffic, and are labeled L, R, and T, respectively.

Physical dimensions: The circuit board is a low-profile add-in card as defined in the PCI Express Card Electromechanical Specification Rev. 1.1: height 68.9mm (exclusive of the PCI faceplate), length 147.3mm (exclusive of the PCI faceplate), total thickness 22mm, weight 94g (including the standard PCI faceplate). The NIC can be supplied with either a standard PCI faceplate (10G-PCIE-8A-S) or a low-profile PCI faceplate (10G-PCIE-8AL-S).

Power: The NIC is powered from 3.3V from the PCI Express port, 3.0A (10W) maximum including up to 1.1W for the SFP+ transceiver.

Environmental: Operating: Temperature 0C to 55C up to 10,000 foot altitude. Relative humidity 15% to 80% @ 50C, non-condensing. Storage: Temperature -40C to 70C. Relative humidity 90% @ 65C.

Test connector: The test connector is used for Myricom's production testing, and should not be used in normal service.

Regulatory Approvals: Fully compliant with EN55024 (1998 w/A1: 2001 & A2: 2003), EN55022 (1998) Class A, AS/NZS 3548 (1005 W/A1 & A2: 97) Class A, CISPR 22 (1997) Class A, FCC Part 15 Subpart B Section 15.109 Class A, VCCI (April 2000) Class A, & ICES-003 Class A (ANSI C63.4 1992). See the Index of Myri-10G Regulatory Reports.

Reduction of Hazardous Substances: These NICs are RoHS-compliant under the server exemption.

Myricom-supported software: These NICs may use the included (bundled) software for 10-Gigabit Ethernet operation, or licensed MX-10G software for 10-Gigabit Myrinet operation. This software is distributed from the Myricom Software & Customer Support page.


10G-PCIE-8A-S (standard PCI faceplate version) with a 10G-SFP-SR transceiver in the SFP+ port

10G-PCIE-8AL-Q product photo

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Last significant revision: 30 June 2008